your primary responsibility will be to analyze and interpret data related to the implementation of a new payroll system. You will work closely with the project team to gather and validate data, perform data cleansing and transformation[...]
POSITION SUMMARY Financial Operations Data Quality Lead provides key support for some system setup, reporting design and data quality controls for processes that have financial impact. This role will also be involved with analyzing dat[...]
Graphics Domain Validation Engineer’s responsibility includes all aspects of System validation from planning & pre-silicon emulation to post-silicon bring-up, validation, and debug. The focus will be on writing new test plans, develo[...]
AMD together we advance_ THE ROLE: AMD is looking for an influential Senior Technical Writer who is passionate about documenting software that enables high performance computing and machine learning at Exascale. You will be a critical [...]
The position entails developing and managing strong partnerships with C suite-level and senior business/regional leaders, while developing and delivering comprehensive external and internal communication strategies in support of though[...]
About the Role The Senior Data Scientist will be a key member of the data analytics team. In this role, you will use your expertise to solve data related challenges in manufacturing operations and vehicle data analysis. You have a stro[...]
Landscape Architect, Project Manager Brampton, ON At EXP, we’re driven to provide innovative solutions for the world’s built and natural environments. As a team of engineers, architects, designers, scientists, creators and a commun[...]
AMD together we advance_ DirectML Driver Performance Engineer THE ROLE: AMD is looking for a specialized software engineer who is passionate about improving the performance of key applications and benchmarks. You will be a member of a [...]
Develop and maintain block level IP and MP subsystem verification architecture, testbenches, test methodology and infrastructureDevelop and debug test plans using SystemVerilog/UVM constrained-random test methodology, C-DPI directed te[...]
Develop and maintain block level RTL IP and MP subsystems’ feature spec, micro-architecture, synthesizable RTL design methodology and infrastructureDevelop and debug RTL designs using C-DPI directed test methodology, and/or using ver[...]