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On-site · Markham
Design and develop diagnostics software to validate security hardware IP across pre-silicon and post-silicon environments. Collaborate with cross-functional teams to debug hardware, firmware, and ASIC issues while integrating AI-driven tools to improve engineering efficiency.
On-site · Markham
Design and develop diagnostics software to validate security hardware IP across various platforms from pre-silicon to production. Create functional and stress tests for cryptographic acceleration engines and deploy AI-based tools to optimize failure triage and debug workflows.
On-site · Markham
Design and implement GPU applications in CUDA/HIP to enhance pre-silicon verification and hardware debugging. Develop automation tools and scripts to analyze performance data for AI/ML workloads on high-end emulators.
On-site · Markham
Design and implement GPU applications in CUDA/HIP to enhance pre-silicon verification and hardware debugging. Develop emulation infrastructure, tools, and scripts to analyze performance data for AI/ML workloads.
On-site · Markham
Design and develop diagnostics software to validate NPU hardware features from pre-silicon through production. Collaborate with cross-functional teams to optimize test suites and deploy AI-based tools for failure triage and debug acceleration.
Hybrid · Markham
The Platform Emulation Software Engineer will design and implement GPU applications in CUDA/HIP to enhance pre-silicon verification and develop tools for hardware debugging. They will also run and analyze performance data for AI/ML workloads on high-end emulators while collaborating with senior engineers to resolve hardware-related failures.
Hybrid · Markham
The Platform Emulation Software Engineer will design and implement GPU applications in CUDA/HIP to enhance pre-silicon verification. They will also develop tools and automation to improve hardware debugging efficiency and analyze performance data for AI/ML workloads.
On-site · Markham
Design and develop diagnostics software to validate NPU hardware features from pre-silicon through production. Collaborate with cross-functional teams to debug hardware issues and automate test workflows using AI-based tools.
On-site · Markham
Design and develop diagnostics software to validate security hardware IP across pre-silicon and post-silicon environments. Collaborate with cross-functional teams to debug hardware, firmware, and ASIC issues while deploying AI-based tools to accelerate testing workflows.
On-site · Markham
The role involves driving the planning, verification, and debug of DCN hardware IP for AMD APU SOC programs. Key duties include executing functional test plans and collaborating with cross-functional teams to ensure silicon readiness and functionality.
On-site · Markham
The IP Systems Engineer will define and execute functional test plans and verification strategies for DCN hardware IP. They will also lead debug efforts across pre-silicon, bringup, and production phases while collaborating with cross-functional teams.
On-site · Markham
Develop and drive the execution of comprehensive software for new technology and product introduction projects. Collaborate with cross-functional teams to validate new features and design future system architectures.
Hybrid · Markham
The role involves developing and executing comprehensive software for new technology and product introduction projects. You will collaborate with cross-functional teams to validate features and design future system architectures.
Hybrid · Markham
Develop and optimize AI software solutions to ensure efficient execution of models and frameworks on GPU-accelerated platforms. Collaborate with cross-functional teams to deliver end-to-end AI software features and contribute to open-source projects.
On-site · Markham
The role involves enabling USB IP, Power Delivery, and Retimer features on AMD Client and Gaming systems. The engineer will define system requirements and collaborate with external vendors to debug and root cause USB failures.
Hybrid · Canada
Design and optimize high-performance algorithms for FPGA physical implementation tools, focusing on placement, routing, and timing. Collaborate with cross-functional teams to improve quality of results, runtime, and memory usage for next-generation device architectures.
Hybrid · Markham
Lead the migration of post-silicon software validation and GFX IP diagnostics into Automated Test Equipment (ATE) and Wafer Sort environments. Architect software pipelines to convert functional diagnostic sequences into cycle-accurate vector formats for production-grade testers.